PLL (phase-locked loop) synthesizers are used in many contexts. For example, they are used in mobile-telephone technology, measurement technology and high-frequency measurement technology. PLL synthesizers are based on a reference oscillator or quartz oscillator, of which the frequency provides the basis for a specified output signal. A phase detector compares the reference frequency specified by the oscillator with the desired signal frequency and issues corresponding voltage pulses. These are then further processed in an integrator or filter circuit and supplied to a voltage-controlled oscillator (VCO). This adapts the frequency of the output oscillation according to the input specification, which, in the phase comparator or detector, is then supplied to the phase detector again via a feedback loop.
On the basis of a high-precision reference frequency, any required frequencies can be generated by means of appropriate division factors. In this context, access is made to a phase and/or frequency control, wherein a version of the required phase function scaled by the factor n is compared with the oscillation of the oscillator. The goal of the control-loop design is to provide rapid frequency-change rates, low signal noise, low component costs and short transient times.
In order to achieve rapid frequency selection in the context of DE 101 60 627 A1, an offset voltage is coupled via an additive-amplification circuit after a first filter stage. However, the disadvantage of this method is that with several selectable loop bandwidths, the cost of circuit technology is extremely high.